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MSBTE - Semester - 6 - Very Large Scale Integration (Elective) - 17659


   

Pdf Specs

Exp

Trainers

Model

1

Write VHDL program for any two basic gates

VHDL100

2

Write VHDL program for full adder / subtractor & Synthesize using FPGA

3

Write VHDL program for 8:1 multiplexer & Synthesize using FPGA

4

Write VHDL program for 2:4 Decoder & Synthesize using FPGA

5

Write VHDL program for 8:3 Encoder & Synthesize using FPGA

6

Write VHDL program for synchronous counter & Synthesize using FPGA

7

Write VHDL program for binary to gray code converter & synthesize using FPGA

8

Interfacing of DAC and ADC using FPGA

FPGA100

9

Interfacing Stepper motor controller using FPGA

10

Implement four Bit ALU or sequence generator.

Theory

     

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